William Chan - BASc. in Computer Engineering
William Chan
University of Waterloo
3B Computer Engineering
Email: me@williamchan.ca
Summary of Technical Skills
  • C/C++ (GCC, Win32 and .NET) (boost, sockets, threads, IO, Windows DDK)
  • x86 Assembly (SSE, SSE2, SSE3)
  • C# (sockets, threads, IO)
  • Java (sockets, threads, IO, OOP, AWT, Swing, SWT, servlets)
  • VB (6.0 and .NET)
  • VHDL
  • Verilog
  • Matlab (Circuits simulation using Simulink)
  • WinDbg (Kernel mode debugging)
  • DirectX 9/10 (HLSL, Shader Model 4.0)
  • OpenGL (GPGPU, textures, PBO)
  • HTML, XHTML, CSS, JavaScript, Flash, ActionScript, Python, Ruby, PHP, Perl, and SQL (Oracle and MySQL)
  • Linux and Unix (Apache, Postfix, qmail, Courier, ProFTPD, compile and setup custom kernels)
  • AutoCAD, and PSpice
  • Perforce, Subversion, GIT, and CVS
Goals and Research Interests
Career Goal:
  • CPU Architect (or VLSI related), Software Architect, or Financial Engineer
Research Interests:
  • CPU Macro-Level Architecture, Machine Learning, Adaptive Algorithms, and Financial Engineering
Work and Research Experience
2009 - Amazon (Seattle) - Prime Software Engineer
  • Prime AdAttribution - re-architected database schemas (Oracle and MySQL) and modified logging infrastructure to more efficiently attribute Amazon Prime signups to specific ads
  • Various ticket fixes on Amazon.com retail website
2009 - Google (Mountain View) - Linux Kernel File Systems Software Engineer
  • Statistical research and analysis on disk latency and bandwidth - designed and implemented disk benchmarks, data analysis on disk performance across entire Google fleet
  • Linux Kernel Power Capping Module - modified a Linux kernel module to output detailed CPU usage
  • Created various scripts and utilities to assist in statistical disk data analysis
2008-Current - University of Waterloo (Waterloo) - VLSI Researcher
  • Instruction Snooping to Increase Performance for CISC CPU Architectures
  • Simulated on 65 nm at 2 GHz with SPEC2000
  • Working with Professor Mohab Anis
  • Submitted paper for IEEE ISCAS 2010 (first author)
2008 - Intel (Santa Clara) - Mobile Platforms Architecture Power and Performance Engineer
  • Adaptive Power Algorithms Research - designed and prototyped several dynamic frequency algorithms for CPU and GMCH to reduce dynamic power leakage, +55% in CPU power reduction with no performance penalty in certain apps/games
  • Multi-Chip Package Power Controller Integral Algorithm - higher CPU/GFX performance while maintaining same TDP (patent pending)
  • Research, analyze, simulate and forecast next generation Mobile Platform Architectures
  • Created various scripts and utilities to assist in power and performance data analysis
2007 - NVIDIA (Santa Clara) - DirectX 9/10 Driver Performance Engineer
  • multi-GPU Shader Research - research on DX10 apps for offloading vertex calculations to IGPU on multi-GPU platforms for Hybrid-SLI implementations
  • Driver Optimizations - various driver optimizations resulting in +20% performance on a platinum title
  • Various new driver features and bug fixes
2007 - AMD (Markham) - DTV Hardware Engineer
  • HD2Player - High Bandwidth Video Playback Research and Development - researched and developed a custom video system designed for 1920x1080 @ 120Hz playback with throughput of over 6Gb/s and designed to scale over 240Hz
  • DVI2LVDS Board - using Verilog, developed a FPGA for a custom proprietary board for converting a DVI/HDMI signals to LVDS for a variety of LCD panels
  • Floating-point Matrix Optimizations - optimized existing matrix code with SSE2 and SSE3, in some cases performance increased over 100%
  • Various video, image and misc. utilities (upsampling, text/picture in picture, frame insertion/duplication for simulation, image conversion to/from proprietary formats for BMP, YUV and PNG)
2005-2008 - Brixon Solutions (Thornhill) - Project Manager and Software Developer
  • Managed various projects from planning to completion while proactively communicating with customers to meet their needs
  • Developed custom software solutions for clients using technologies such as C#, Linux, MySQL, PHP, JavaScript, CSS, Flash, and HTML
Extracurriculars
2006-2008 - University of Waterloo ASIC Team
  • GZip ASIC Development - Developing Huffman Decoder and IO Communication Block (low level transport system with data integrity system over RS232)
2005-2006 - Unionville High School Robotics Team Leader
  • Manage and integrate mechanical, electrical, programming, and media teams
  • Negotiated and acquired sponsorship funds from companies such as ATI and Pathcom
  • Worked with time and budget constraints
  • Co-led rookie team to a 6-4-0 record and placed 28th out of 74 teams in the Toronto Regional FIRST Robotics Competition
Education
2010 - National University of Singapore
  • 4 months Student Exchange
Society of Actuaries
  • September 2008 - Completed SOA Exam P
2006-Current - University of Waterloo - Bachelor of Applied Science in Computer Engineering with Option in Management Sciences
  • Year 3 - Graduate in 2011
  • University of Waterloo Merit Scholarship
2002-2006 - Unionville High School
  • Honour Roll
  • Ontario Scholars' Award
  • Ontario Principals' Award
Volunteer Contributions
2009 - Seattle Food Lifeline
  • Packaged frozen food for redistribution to soup kitchens and shelters
2007 - UHS Robotics Team Mentor
  • Mentored and assisted former Robotics Team
2004-2005 - School Network Administrator
  • Helped manage school's computer network
  • Installed hardware, created and deployed disk images
2005 - Grade 11 Computer Science Teaching Assistant
  • Helped teach students Java
2002-2004 - Local Doctor's clinic
  • Organized patients' files
  • Prepared files for appointments and created templates for Doctor's usage
Personal Projects
SHA-1 Research on Core 2 Duo
  • Research project aims for maximum efficiency of the SHA-1 algorithm on the Merom class processors, minimal pipeline stalls, minimal cache misses, and maximal IPC are main priorities
  • Optimization techniques include SSE2, loop unrolling and inline functions
  • C version is 41.37% faster than the default code given in RFC 3174 (both compiled on Visual Studio 2005)
  • Assembly and SSE version of algorithm is in development
3D Rendering Engine
  • Simple 3D Software Rendering Engine
  • Simple API allows creation and rendering of 2/3D Polygons
  • Written with my own rendering algorithms (no OpenGL or DirectX)
SSE memcpy
  • 30-70% faster than default memcpy of "string.h" in Visual Studio 2005 on Release mode with optimizations depending on data transfer size
  • Written with SSE assembly with SSE2 prefetch
Networking
  • Java and C# multithreaded server and client
Various Custom Mini-Robots
  • Built from scratch without guidance
  • H-Bridge - DC bidirectional motor control
  • Stepping Motors - Custom built DLL using the inpout32 library for high speed stepping motor control
Personal Investments
  • Wealth Management from savings, contracting and internship earnings
  • Diversification and management of portfolio into stocks, options, bonds, cash and equivalents (USD and CND)
Notable Information
  • English is first language, also fluent in Cantonese
  • Experience with I2C and SPI buses
  • Worked with various microprocessors (Microchip C), stamps (Parallax PBASIC), op-amps, MOSFETs, TTLs and CMOS (7400 series, and 555 timer)
  • Experience with multimeter, and soldering
  • Experience with oscilloscope with LVDS transmissions (7.4 Gb/s)
  • Worked with power tools (drill presses, band, mitre and table saws), on a variety of material (aluminum, steel, polycarbonate, and wood)
  • Experience with open source libraries including zLib, and CImg
  • Experience with other programming/scripting languages including MIPS Assembly, Tcl, and Bash